Egress packet modification conventionally involves a packet stored in a memory. A processor that is executing software or firmware instructions accesses the packet in memory, and modifies the packet. Typically part of the packet or all of the packet is read from memory, is analyzed, and is then written back into the memory in modified form. Some modifications involve the inserting of bits into the packet. In such a case, a second part of the packet may be read out of memory and then written back such that there exists a space in memory between the second part of the packet and a first part of the packet. The bits to be inserted are then written into the memory into memory locations between where the first part and the second part are stored. Other modifications involve the replacement of parts of the packet, or the incrementing or the decrementing of values in certain fields of the packet. To carry out such a modification, the processor executing the software or firmware fetches instructions from a code memory, decodes the instructions, and then executes the instructions. Execution of the instructions causes the desired modifications to take place. Part of the packet is read out of memory, and is then written back into memory. At the end of the egress modification process, the modified packet exists in the memory. As higher and higher packet throughputs and output bit rates are required, multiple such processors are brought to bear in performing the necessary modifications. The resulting modified packets in memory are then read out of the memory and are supplied to egress MAC functionality. From the egress MAC functionality the packets are communicated across a physical interface.